1. Field of the Invention
The present invention relates to an oscillation frequency control circuit of an oscillator, and especially relates to an oscillation frequency control circuit that synchronizes with an external reference signal, corrects frequency thereof, and is highly stable in accordance with temperature characteristics of detection of the external reference signal.
2. Description of the Related Art
Required precision for a frequency reference signal becomes increasingly higher in a base station of next-generation mobile communication, terrestrial digital broadcasting and the like.
As the frequency reference signal, a cesium frequency reference oscillator, a rubidium frequency reference oscillator, a frequency synchronization type reference oscillator by a GPS  signal and the like are used in a system of a broadcasting and communication field.
However, the oscillators are generally expensive, so that the reference signal from the oscillators is divided to be used as a reference signal source of a device.
The divided reference signal is used as a reference clock of a communication system.
Specifically, this is used as a reference signal of phase comparison of a phase locked loop (PLL) circuit, the reference clock signal of a digital signal processor (DSP) and a field programmable gate array (FPGA) and a sampling clock of a digital/analog (DA) converter and an analog/digital (AD) converter.
[Conventional PLL Circuit: FIG. 6]
Next, a conventional PLL circuit is described with reference to FIG. 6. FIG. 6 is a configuration block diagram of a general PLL circuit.
The PLL circuit is provided with a phase comparator 32 that compares an external reference signal (Fref) and a signal divided into 1/N to output a phase difference signal, a charge pump 33 that outputs phase difference with voltage of pulse width, a loop filter 34 that smoothes output voltage from the charge pump 33, a voltage controlled crystal oscillator (VCXO) 35 that changes the frequency by control voltage from the loop filter  34 to oscillation-output desired frequency (internal reference signal: output frequency), and a divider 36 that divides an output (internal reference signal) of the VCXO 35 into 1/N as shown in FIG. 6.
Meanwhile, the internal reference signal is a signal of N×Fref.
The PLL circuit is for obtaining an oscillation output synchronized with the reference signal by performing feed-back control to the VCXO 35 inside thereof such that the phase difference between the externally input reference signal and the VCXO 35 inside thereof is constant.
Specifically, the phase comparator 32 is for performing high-precision signal generation by performing PLL control in which the phases of the highly stable external reference signal and of the output signal from the VCXO 35, which is frequency-controlled by input voltage, are compared and direct-current voltage obtained by smoothing a phase comparison result is fed back to the VCXO 35. The PLL circuit is widely used in communication and broadcasting devices.
Meanwhile, as the conventional art relating to the oscillation frequency control circuit in the conventional oscillator, there are Japanese Patent Application Laid-Open No. 2000-083003 (Patent Document 1) and Japanese Patent Application Laid-Open No. 2003-179489 (Patent Document 2). 
The Patent Document 1 discloses a free-running frequency adjusting method in which count operation in synchronization with an output signal of a voltage-controlled oscillator (VCO) in which a frequency counter is input in a time period corresponding to the pulse width is performed, a counted value corresponding to oscillation frequency of the VCO is held in a latch circuit, and, when a counted value deviates from a predetermined range, the CPU changes applied voltage of the VCO to adjust such that the free-running frequency is within the predetermined range.
Also, the Patent Document 2 discloses a phase lock loop circuit having an automatic adjusting function of the free-running frequency of the voltage-controlled oscillator in which a microcomputer counts a pulse of an output pulse signal of the VCO in a period in which the output of the phase comparator is in a predetermined level, updates data for control in accordance with the counted value, and couples the data with a signal from a low pas filter (LPF) as an analog signal in a digital analog converter (DAC) to obtain a frequency control signal of the VCO.